var searchData=
[
  ['a_20binary_20installer_0',['Compiling a binary installer',['../page_build_guide.html#compile_binary_installer_mscv',1,'']]],
  ['a_20custom_20name_1',['Set a custom name',['../page_identification.html#id_naming_set',1,'']]],
  ['a_20data_20node_20worker_20node_20dependency_2',['a data node =&gt; worker node dependency',['../classuhd_1_1experts_1_1data__reader__t.html#autotoc_md259',1,'']]],
  ['a_20filter_20and_20antenna_20switches_3',['Frontend Side A Filter and Antenna Switches',['../page_usrp_e3xx.html#e31x_dboard_e310_frontend_a_switches',1,'']]],
  ['a_20mender_20artifact_4',['Downloading a Mender Artifact',['../page_usrp_x4xx.html#x4xx_updating_filesystems_mender_artifact',1,'']]],
  ['a_20new_20daughterboard_20id_20into_20the_20eeprom_5',['Step 2: Burn a new daughterboard id into the EEPROM',['../page_dboards.html#dboards_dbsrxmod_2',1,'']]],
  ['a_20non_20standard_20image_6',['a Non standard Image',['../page_usrp1.html#usrp1_imgs',1,'Specify a Non-standard Image'],['../page_usrp_b100.html#b100_imgs',1,'Specify a Non-standard Image'],['../page_usrp_e1x0.html#e1x0_imgs',1,'Specify a Non-standard Image'],['../page_usrp_b200.html#b200_imgs',1,'Specifying a Non-standard Image']]],
  ['a_20power_20supply_20with_20the_20b2x0_20and_20gpsdo_7',['Using a power supply with the B2x0 and GPSDO',['../page_gpsdo_b2x0.html#gpsdob_power',1,'']]],
  ['a_20receive_20streamer_8',['Create a receive streamer',['../page_usrp2.html#usrp2_altstream_rxstream',1,'']]],
  ['a_20reference_9',['Selecting a reference',['../page_octoclock.html#selecting',1,'']]],
  ['a_20simulation_20makefile_10',['Writing a Simulation Makefile',['../md_usrp3_2sim_2writing__sim__makefile.html',1,'']]],
  ['a_20subclass_11',['is required to implement the &quot;resolve&quot; method in a subclass.',['../classuhd_1_1experts_1_1worker__node__t.html#autotoc_md261',1,'']]],
  ['a_20testbench_12',['a Testbench',['../md_usrp3_2sim_2running__testbenches.html',1,'Running a Testbench'],['../md_usrp3_2sim_2writing__testbenches.html',1,'Writing a Testbench']]],
  ['a_20top_20level_20simulation_20module_13',['Writing a Top-level Simulation Module',['../md_usrp3_2sim_2writing__sim__top.html',1,'']]],
  ['a_20usrp_20device_14',['Naming a USRP Device',['../page_identification.html#id_naming',1,'']]],
  ['a_20usrp_20x4x0_20from_20uhd_15',['Using a USRP X4x0 from UHD',['../page_usrp_x4xx.html#x4xx_usage',1,'']]],
  ['a_20worker_20node_20data_20node_20dependency_16',['to establish a worker node =&gt; data node dependency',['../classuhd_1_1experts_1_1data__writer__t.html#autotoc_md260',1,'']]],
  ['acceleration_17',['SIMD Acceleration',['../page_usrp_x3x0_config.html#x3x0cfg_hostpc_volk',1,'']]],
  ['access_18',['access',['../classuhd_1_1property__tree.html#ac9bb57d70cdefe58468b208f250059e4',1,'uhd::property_tree']]],
  ['access_20to_20emmc_19',['USB Access to eMMC',['../page_usrp_x4xx.html#x4xx_accessing_emmc_usb',1,'']]],
  ['access_5ferror_20',['access_error',['../structuhd_1_1access__error.html',1,'uhd::access_error'],['../structuhd_1_1access__error.html#aa6101ea0c00f58210f1d6ad9bcd73224',1,'uhd::access_error::access_error()']]],
  ['access_5freader_21',['ACCESS_READER',['../namespaceuhd_1_1experts.html#ae83dbd84897210359642add473488a8fae1068f9d8a6cc8faa2c226e62d4ee4db',1,'uhd::experts']]],
  ['access_5ft_22',['access_t',['../classuhd_1_1rfnoc_1_1property__base__t.html#a4a594ebe265c2a5a9dd5fb3452ed42f5',1,'uhd::rfnoc::property_base_t']]],
  ['access_5fwriter_23',['ACCESS_WRITER',['../namespaceuhd_1_1experts.html#ae83dbd84897210359642add473488a8fa26f7ea830ff643cc369bc9c929e5156a',1,'uhd::experts']]],
  ['accessing_20user_20settings_24',['Custom FPGA images and accessing user settings',['../page_usrp_b200.html#b200_customfpga',1,'']]],
  ['accessors_25',['with accessors.',['../classuhd_1_1experts_1_1node__retriever__t.html#autotoc_md257',1,'']]],
  ['across_20frequency_26',['Retaining gain or power levels across frequency',['../page_power.html#power_tune_owner',1,'']]],
  ['action_20forwarding_20behavior_27',['Property Propagation and Action Forwarding Behavior',['../classuhd_1_1rfnoc_1_1split__stream__block__control.html#ss_fwd_behavior',1,'']]],
  ['action_20handling_28',['Action Handling',['../classuhd_1_1rfnoc_1_1replay__block__control.html#rfnoc_block_replay_actions',1,'']]],
  ['action_5fhandler_5ft_29',['action_handler_t',['../classuhd_1_1rfnoc_1_1node__t.html#a673253295515ed59fc602cb68943bd9c',1,'uhd::rfnoc::node_t']]],
  ['action_5finfo_30',['action_info',['../structuhd_1_1rfnoc_1_1action__info.html',1,'uhd::rfnoc::action_info'],['../structuhd_1_1rfnoc_1_1action__info.html#acd8e3930a466dfbcbf3ca453e8fe0277',1,'uhd::rfnoc::action_info::action_info()']]],
  ['actions_2ehpp_31',['actions.hpp',['../actions_8hpp.html',1,'']]],
  ['actual_5fdsp_5ffreq_32',['actual_dsp_freq',['../structuhd__tune__result__t.html#a5b857855a318958e26825bf6b77d6ddf',1,'uhd_tune_result_t::actual_dsp_freq'],['../structuhd_1_1tune__result__t.html#a6f4fdd6b4dd360e0fa31c847c50e3b7d',1,'uhd::tune_result_t::actual_dsp_freq']]],
  ['actual_5frf_5ffreq_33',['actual_rf_freq',['../structuhd__tune__result__t.html#a0045855258021c69b0f288a632700862',1,'uhd_tune_result_t::actual_rf_freq'],['../structuhd_1_1tune__result__t.html#a9e111d65a9c321d5bd7415ec0f62d9da',1,'uhd::tune_result_t::actual_rf_freq']]],
  ['adapter_5fid_2ehpp_34',['adapter_id.hpp',['../adapter__id_8hpp.html',1,'']]],
  ['adapter_5fid_5ft_35',['adapter_id_t',['../namespaceuhd_1_1transport.html#a722a016aec09f876d710f08849f49410',1,'uhd::transport']]],
  ['adc_20self_20calibration_36',['ADC self calibration',['../page_usrp_x4xx.html#x4xx_adc_self_cal',1,'']]],
  ['adc_5fself_5fcalibration_37',['ADC_SELF_CALIBRATION',['../classuhd_1_1features_1_1discoverable__feature.html#a1a5a211601b5474a17afb6e6bd91c927a513703ef823478935f0b1ad77ae34f7e',1,'uhd::features::discoverable_feature']]],
  ['adc_5fself_5fcalibration_5fiface_38',['adc_self_calibration_iface',['../classuhd_1_1features_1_1adc__self__calibration__iface.html',1,'uhd::features']]],
  ['adc_5fself_5fcalibration_5fiface_2ehpp_39',['adc_self_calibration_iface.hpp',['../adc__self__calibration__iface_8hpp.html',1,'']]],
  ['add_40',['add',['../classuhd_1_1soft__regmap__db__t.html#a4aaaa0bea1bcaa29a3d0034dfa6a8b54',1,'uhd::soft_regmap_db_t::add(soft_regmap_t &amp;regmap)'],['../classuhd_1_1soft__regmap__db__t.html#aa077ce70b7eddcc461b592423d1491e9',1,'uhd::soft_regmap_db_t::add(soft_regmap_db_t &amp;db)']]],
  ['add_5fcoerced_5fsubscriber_41',['add_coerced_subscriber',['../classuhd_1_1property.html#a4a5e9916ff2c92fd7d5f1504ce9f6a7d',1,'uhd::property']]],
  ['add_5fdata_5fnode_42',['add_data_node',['../classuhd_1_1experts_1_1expert__factory.html#a17af9b4d99aa99ab5f167a85b62a2ac5',1,'uhd::experts::expert_factory']]],
  ['add_5fdesired_5fsubscriber_43',['add_desired_subscriber',['../classuhd_1_1property.html#adfc0f231800adf2fc0644b6de8c7f76f',1,'uhd::property']]],
  ['add_5fdual_5fprop_5fnode_44',['add_dual_prop_node',['../classuhd_1_1experts_1_1expert__factory.html#a28cfc00b31a5e4771b0e4b1ed2683ead',1,'uhd::experts::expert_factory::add_dual_prop_node(expert_container::sptr container, property_tree::sptr subtree, const fs_path &amp;path, const std::string &amp;desired_name, const std::string &amp;coerced_name, const data_t &amp;init_val, const auto_resolve_mode_t mode=AUTO_RESOLVE_OFF)'],['../classuhd_1_1experts_1_1expert__factory.html#ae05b0390bab0deb637a82a517f4db130',1,'uhd::experts::expert_factory::add_dual_prop_node(expert_container::sptr container, property_tree::sptr subtree, const fs_path &amp;path, const data_t &amp;init_val, const auto_resolve_mode_t mode=AUTO_RESOLVE_OFF)']]],
  ['add_5ffrequency_5fband_45',['add_frequency_band',['../classuhd_1_1usrp_1_1cal_1_1zbx__tx__dsa__cal.html#a4bd0ec441256e7fedffebae540b6a36b',1,'uhd::usrp::cal::zbx_tx_dsa_cal::add_frequency_band()'],['../classuhd_1_1usrp_1_1cal_1_1zbx__rx__dsa__cal.html#a37a877603aed0b07d3b7b7bfe00778ab',1,'uhd::usrp::cal::zbx_rx_dsa_cal::add_frequency_band()']]],
  ['add_5fhop_46',['add_hop',['../classuhd_1_1rfnoc_1_1chdr_1_1mgmt__payload.html#a85efaa28414f3e77b6ddb4078d327c95',1,'uhd::rfnoc::chdr::mgmt_payload']]],
  ['add_5flogger_47',['add_logger',['../namespaceuhd_1_1log.html#a391fefe7509ffc5ab6aedcd42f08902d',1,'uhd::log']]],
  ['add_5fop_48',['add_op',['../classuhd_1_1rfnoc_1_1chdr_1_1mgmt__hop__t.html#a679e7845a612972f2971b069af173f52',1,'uhd::rfnoc::chdr::mgmt_hop_t']]],
  ['add_5fpower_5ftable_49',['add_power_table',['../classuhd_1_1usrp_1_1cal_1_1pwr__cal.html#aef297e058ce034aa669c1a7ebbae9f6e',1,'uhd::usrp::cal::pwr_cal']]],
  ['add_5fprop_5fnode_50',['add_prop_node',['../classuhd_1_1experts_1_1expert__factory.html#a49e3d80447364743365f5f39b15b1915',1,'uhd::experts::expert_factory::add_prop_node(expert_container::sptr container, property_tree::sptr subtree, const fs_path &amp;path, const std::string &amp;name, const data_t &amp;init_val, const auto_resolve_mode_t mode=AUTO_RESOLVE_OFF)'],['../classuhd_1_1experts_1_1expert__factory.html#ab0cd80fca8fda7bac0abb7031b29c184',1,'uhd::experts::expert_factory::add_prop_node(expert_container::sptr container, property_tree::sptr subtree, const fs_path &amp;path, const data_t &amp;init_val, const auto_resolve_mode_t mode=AUTO_RESOLVE_OFF)']]],
  ['add_5fproperty_5fresolver_51',['add_property_resolver',['../classuhd_1_1rfnoc_1_1node__t.html#adb1c460b42f1730306ede3c4ebab79c4',1,'uhd::rfnoc::node_t']]],
  ['add_5fto_5fmap_52',['add_to_map',['../classuhd_1_1soft__regmap__t.html#ad0061196a2223318e61f9b4e76066c1b',1,'uhd::soft_regmap_t']]],
  ['add_5fworker_5fnode_53',['add_worker_node',['../classuhd_1_1experts_1_1expert__factory.html#a612fd906c2bc198c59b967baf46bfd13',1,'uhd::experts::expert_factory::add_worker_node(expert_container::sptr container)'],['../classuhd_1_1experts_1_1expert__factory.html#a00cf3ecb8785fcd597545a6d7c6d69d5',1,'uhd::experts::expert_factory::add_worker_node(expert_container::sptr container, Args const &amp;... args)']]],
  ['adding_20dsp_20logic_20to_20generation_202_20products_54',['Adding DSP logic to Generation 2 products',['../md_usrp2_2customize__signal__chain.html#autotoc_md106',1,'']]],
  ['additional_20build_20options_55',['Additional Build Options',['../md_usrp3_2build__instructions.html#autotoc_md149',1,'']]],
  ['additional_20stream_20arguments_56',['Additional Stream Arguments',['../page_configuration.html#config_stream_args_args',1,'']]],
  ['addr_57',['addr',['../structuhd_1_1rfnoc_1_1chdr_1_1mgmt__op__t_1_1cfg__payload.html#aa4727dca4a8745f5a3a7032c5a878816',1,'uhd::rfnoc::chdr::mgmt_op_t::cfg_payload']]],
  ['address_58',['Address',['../md_usrp3_2sim_2libs__axi.html#autotoc_md182',1,'']]],
  ['address_59',['address',['../classuhd_1_1rfnoc_1_1chdr_1_1ctrl__payload.html#a9fd5be912cea5ad759c9a83de7915baa',1,'uhd::rfnoc::chdr::ctrl_payload::address'],['../page_usrp_x3x0.html#x3x0_setup_change_ip',1,'Change the USRP&apos;s IP address'],['../page_usrp2.html#usrp2_network_changeip',1,'Change the USRP2&apos;s IP address'],['../page_usrp_x3x0_config.html#x3x0cfg_hostpc_netcfg_ip',1,'Configuring the host&apos;s IP address']]],
  ['address_20string_60',['Device Configuration through address string',['../page_configuration.html#config_devaddr',1,'']]],
  ['addressing_20the_20device_61',['Addressing the Device',['../page_usrp2.html#usrp2_addr',1,'Addressing the Device'],['../page_usrp_x3x0.html#x3x0_addressing',1,'Addressing the Device']]],
  ['addsub_5fblock_5fcontrol_62',['addsub_block_control',['../classuhd_1_1rfnoc_1_1addsub__block__control.html',1,'uhd::rfnoc']]],
  ['addsub_5fblock_5fcontrol_2ehpp_63',['addsub_block_control.hpp',['../addsub__block__control_8hpp.html',1,'']]],
  ['advanced_20usage_20notes_64',['Advanced Usage Notes',['../page_python.html#python_install_adv',1,'']]],
  ['advisory_65',['Multiple Timed Command Advisory',['../page_usrp_x3x0.html#x3x0_misc_timed_cmds_lockup',1,'']]],
  ['after_20tuning_20on_20receive_3a_66',['Pseudo-code for dealing with settling time after tuning on receive:',['../page_general.html#general_tuning_waitcode',1,'']]],
  ['algorithm_2ehpp_67',['algorithm.hpp',['../algorithm_8hpp.html',1,'']]],
  ['align_20cordics_20in_20the_20dsp_68',['Align CORDICs in the DSP',['../page_sync.html#sync_phase_cordics',1,'']]],
  ['align_20los_20in_20the_20front_20end_20others_69',['Align LOs in the front-end (others)',['../page_sync.html#sync_phase_lootherfe',1,'']]],
  ['align_20los_20in_20the_20front_20end_20sbx_20ubx_70',['Align LOs in the front-end (SBX, UBX)',['../page_sync.html#sync_phase_lo',1,'']]],
  ['alignment_20testing_20receiver_71',['alignment testing Receiver',['../page_rdtesting.html#rdtesting_phase_rx_auto',1,'Automatic phase alignment testing (Receiver)'],['../page_rdtesting.html#rdtesting_phase_rx_manual',1,'Manual phase alignment testing (Receiver)']]],
  ['alignment_20tests_72',['Phase alignment tests',['../page_rdtesting.html#rdtesting_phasealignment',1,'']]],
  ['all_5fchans_73',['ALL_CHANS',['../classuhd_1_1rfnoc_1_1radio__control.html#ab475b5619cdd8d91c37fb99b99c8eb23',1,'uhd::rfnoc::radio_control::ALL_CHANS'],['../classuhd_1_1usrp_1_1multi__usrp.html#afeaca319029cb49f7041461345ab641c',1,'uhd::usrp::multi_usrp::ALL_CHANS']]],
  ['all_5fgains_74',['ALL_GAINS',['../classuhd_1_1rfnoc_1_1radio__control.html#aa66a7bb87a0a2ec95b6e8f9670ec4f3e',1,'uhd::rfnoc::radio_control::ALL_GAINS'],['../classuhd_1_1usrp_1_1multi__usrp.html#a524b7e2177492e59382f1124ee32c12b',1,'uhd::usrp::multi_usrp::ALL_GAINS']]],
  ['all_5flos_75',['ALL_LOS',['../classuhd_1_1rfnoc_1_1radio__control.html#a3efe7ddb245ac48278b7d135807f00b6',1,'uhd::rfnoc::radio_control::ALL_LOS'],['../classuhd_1_1usrp_1_1multi__usrp.html#a1d5eaa4fb855a52aa97c328ec2fa387b',1,'uhd::usrp::multi_usrp::ALL_LOS']]],
  ['all_5fmboards_76',['ALL_MBOARDS',['../classuhd_1_1usrp_1_1multi__usrp.html#a21f2ba01462e1f211a8823fda24a82d5',1,'uhd::usrp::multi_usrp']]],
  ['altera_20fpga_20builds_77',['Altera FPGA builds',['../page_images.html#images_building_altera',1,'']]],
  ['alternative_20stream_20destination_78',['Alternative stream destination',['../page_usrp2.html#usrp2_altstream',1,'']]],
  ['always_5fdirty_79',['ALWAYS_DIRTY',['../classuhd_1_1rfnoc_1_1node__t.html#aecac21aeb9bbadf8ee1ad4d560de33b5',1,'uhd::rfnoc::node_t']]],
  ['always_5fflush_80',['ALWAYS_FLUSH',['../namespaceuhd.html#ad780ee43a0ed61d03b7c217e1e7c3e21ae613792d0cb1e928c6cafd7f595f7ab4',1,'uhd']]],
  ['amplitude_20ranges_20and_20clipping_81',['Amplitude Ranges and Clipping',['../page_power.html#power_amp_rate',1,'']]],
  ['an_20application_82',['Configuring the device in an application',['../page_usrp_x3x0.html#x3x0_misc_settings',1,'']]],
  ['an_20e3xx_20usrp_20from_20uhd_83',['Using an E3XX USRP from UHD',['../page_usrp_e3xx.html#e3xx_usage',1,'']]],
  ['an_20equality_20operator_84',['- Must have an equality operator (==)',['../classuhd_1_1experts_1_1data__node__t.html#autotoc_md256',1,'']]],
  ['an_20ethernet_20compatible_20device_85',['Detecting an Ethernet-compatible device',['../page_octoclock.html#detecting_new_unit',1,'']]],
  ['an_20example_86',['An Example',['../page_gpio_api.html#xgpio_fpanel_xample',1,'']]],
  ['an_20n_20series_20device_87',['Unbricking an N-Series Device',['../page_usrp2.html#usrp2_unbrick_n2x0',1,'']]],
  ['an_20n3xx_20usrp_20from_20uhd_88',['Using an N3XX USRP from UHD',['../page_usrp_n3xx.html#n3xx_usage',1,'']]],
  ['an_20sdk_89',['an SDK',['../page_usrp_e3xx.html#e3xx_software_dev_sdk',1,'Obtaining an SDK'],['../page_usrp_n3xx.html#n3xx_software_dev_sdk',1,'Obtaining an SDK']]],
  ['an_20x3x0_20usrp_20from_20uhd_90',['Using an X3X0 USRP from UHD',['../page_usrp_x3x0.html#x3x0_usage',1,'']]],
  ['analog_5fband_5fpass_91',['ANALOG_BAND_PASS',['../classuhd_1_1filter__info__base.html#a6012599f30b48222e25da985f7191ddea678482f07b27826649fa1458b8d6b762',1,'uhd::filter_info_base']]],
  ['analog_5ffilter_5fbase_92',['analog_filter_base',['../classuhd_1_1analog__filter__base.html',1,'uhd::analog_filter_base'],['../classuhd_1_1analog__filter__base.html#a9d770f397c63c428c8bdd359bc9ef179',1,'uhd::analog_filter_base::analog_filter_base()']]],
  ['analog_5ffilter_5flp_93',['analog_filter_lp',['../classuhd_1_1analog__filter__lp.html',1,'uhd::analog_filter_lp'],['../classuhd_1_1analog__filter__lp.html#a413ce8080f3e8aa4b1d4d0a38d41ccde',1,'uhd::analog_filter_lp::analog_filter_lp()']]],
  ['analog_5flow_5fpass_94',['ANALOG_LOW_PASS',['../classuhd_1_1filter__info__base.html#a6012599f30b48222e25da985f7191ddeab354c3d3d2f5acb91589c4fc5cd2feca',1,'uhd::filter_info_base']]],
  ['and_2010_20mhz_20reference_20signals_95',['External PPS and 10 MHz reference signals',['../page_sync.html#sync_commonref_pps',1,'']]],
  ['and_20accessing_20user_20settings_96',['Custom FPGA images and accessing user settings',['../page_usrp_b200.html#b200_customfpga',1,'']]],
  ['and_20action_20forwarding_20behavior_97',['Property Propagation and Action Forwarding Behavior',['../classuhd_1_1rfnoc_1_1split__stream__block__control.html#ss_fwd_behavior',1,'']]],
  ['and_20antenna_20switches_98',['and Antenna Switches',['../page_usrp_e3xx.html#e31x_dboard_e310_band_select',1,'Frontend Filter and Antenna Switches'],['../page_usrp_e3xx.html#e31x_dboard_e310_frontend_a_switches',1,'Frontend Side A Filter and Antenna Switches'],['../page_usrp_e3xx.html#e31x_dboard_e310_frontend_b_switches',1,'Frontend Side B Filter and Antenna Switches']]],
  ['and_20back_20panels_99',['Front and Back Panels',['../page_usrp_x4xx.html#x4xx_overview_panels',1,'']]],
  ['and_20bricking_100',['and bricking',['../page_usrp2.html#usrp2_loadflash_brick',1,'Device recovery and bricking'],['../page_usrp_x3x0.html#x3x0_flash_bricking',1,'Device recovery and bricking']]],
  ['and_20clipping_101',['Amplitude Ranges and Clipping',['../page_power.html#power_amp_rate',1,'']]],
  ['and_20compiling_20uhd_20and_20mpm_20for_20the_20e320_102',['Modifying and compiling UHD and MPM for the E320',['../page_usrp_e3xx.html#e3xx_software_dev',1,'']]],
  ['and_20compiling_20uhd_20and_20mpm_20for_20the_20n3xx_103',['Modifying and compiling UHD and MPM for the N3XX',['../page_usrp_n3xx.html#n3xx_software_dev',1,'']]],
  ['and_20converter_20choice_104',['Formats and Converter Choice',['../page_converters.html#converters_formats',1,'']]],
  ['and_20cooling_105',['Rack Mounting and Cooling',['../page_usrp_x4xx.html#x4xx_overview_rackmount',1,'']]],
  ['and_20device_20numbering_106',['Channel and Device Numbering',['../page_multiple.html#multiple_channumbers',1,'']]],
  ['and_20disabling_20usage_107',['and Disabling Usage',['../page_ni_rio_kernel.html#linux_enabling',1,'Enabling and Disabling Usage'],['../page_ni_rio_kernel.html#win_enabling',1,'Enabling and Disabling Usage']]],
  ['and_20eeprom_108',['Flash Memory and EEPROM',['../page_zbx.html#zbx_flash',1,'']]],
  ['and_20emulated_20features_109',['Missing and Emulated Features',['../page_usrp1.html#usrp1_emul',1,'']]],
  ['and_20execution_110',['and execution',['../page_usrp_e3xx.html#e3xx_rasm_salt',1,'Salt: Remote configuration management and execution'],['../page_usrp_n3xx.html#n3xx_rasm_salt',1,'Salt: Remote configuration management and execution']]],
  ['and_20features_111',['Overview and Features',['../page_usrp_x4xx.html#x4xx_overview',1,'']]],
  ['and_20fedora_112',['Setting up build dependencies on Ubuntu and Fedora',['../md_usrp3_2build__instructions.html#autotoc_md117',1,'']]],
  ['and_20fpga_20images_113',['Firmware and FPGA Images',['../page_images.html',1,'page_devices']]],
  ['and_20frontend_20correction_114',['Device Calibration and Frontend Correction',['../page_calibration.html',1,'page_devices']]],
  ['and_20functions_115',['PkgTestExec Tasks and Functions',['../md_usrp3_2sim_2simulation__libraries.html#autotoc_md221',1,'']]],
  ['and_20gateway_116',['Set the subnet and gateway',['../page_usrp2.html#usrp2_altstream_subnet',1,'']]],
  ['and_20gpsdo_117',['Using a power supply with the B2x0 and GPSDO',['../page_gpsdo_b2x0.html#gpsdob_power',1,'']]],
  ['and_20host_20operating_20system_118',['The RFSoC CPU/FPGA and Host Operating System',['../page_usrp_x4xx.html#x4xx_overview_rfsoc',1,'']]],
  ['and_20host_20operating_20system_119',['and host operating system',['../page_usrp_e3xx.html#e310_zynq',1,'The Zynq CPU/FPGA and host operating system'],['../page_usrp_e3xx.html#e320_zynq',1,'The Zynq CPU/FPGA and host operating system'],['../page_usrp_n3xx.html#n3xx_zynq',1,'The Zynq CPU/FPGA and host operating system']]],
  ['and_20includes_120',['Timescale Defines and Includes',['../md_usrp3_2sim_2legacy__testbenches.html#autotoc_md153',1,'']]],
  ['and_20install_121',['Build and install',['../page_build_guide.html#build_install_unix',1,'']]],
  ['and_20install_20modelsim_20optional_122',['Download and Install ModelSim (Optional)',['../md_usrp3_2build__instructions.html#autotoc_md116',1,'']]],
  ['and_20install_20with_20visual_20studio_123',['Compile and Install with Visual Studio',['../page_build_guide.html#msvc_generate',1,'']]],
  ['and_20install_20xilinx_20tools_124',['Download and Install Xilinx Tools',['../md_usrp3_2build__instructions.html#autotoc_md115',1,'']]],
  ['and_20installing_20uhd_20from_20source_125',['Building and Installing UHD from source',['../page_build_guide.html',1,'index']]],
  ['and_20key_126',['Serial number and key',['../classuhd_1_1usrp_1_1cal_1_1database.html#cal_db_serial',1,'']]],
  ['and_20lfrx_127',['Basic RX and LFRX',['../page_dboards.html#dboards_basicrx',1,'']]],
  ['and_20lftx_128',['Basic TX and LFTX',['../page_dboards.html#dboards_basictx',1,'']]],
  ['and_20minor_20compat_20numbers_129',['Major and Minor Compat Numbers',['../page_compat.html#compat_minor_major',1,'']]],
  ['and_20motherboard_20daughterboard_20revisions_130',['Module and Motherboard/Daughterboard Revisions',['../page_usrp_n3xx.html#n3xx_mg_revs',1,'']]],
  ['and_20mpm_20for_20the_20e320_131',['Modifying and compiling UHD and MPM for the E320',['../page_usrp_e3xx.html#e3xx_software_dev',1,'']]],
  ['and_20mpm_20for_20the_20n3xx_132',['Modifying and compiling UHD and MPM for the N3XX',['../page_usrp_n3xx.html#n3xx_software_dev',1,'']]],
  ['and_20n2x0_20series_133',['USRP2 and N2x0 Series',['../page_usrp2.html',1,'page_devices']]],
  ['and_20nyquist_134',['Master clock rate and Nyquist',['../page_general.html#general_sampleratenotes_nyquist',1,'']]],
  ['and_20or_20building_20uhd_135',['Installing and/or Building UHD',['../index.html#autotoc_md13',1,'']]],
  ['and_20outputs_136',['and Outputs',['../md_usrp3_2build__instructions.html#autotoc_md128',1,'B2x0 Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md131',1,'B2xx-mini Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md137',1,'E310 Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md140',1,'E320 Targets and Outputs'],['../md_usrp2_2build__instructions.html#autotoc_md102',1,'N2x0 Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md143',1,'N3xx Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md127',1,'Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md134',1,'X3x0 Targets and Outputs'],['../md_usrp3_2build__instructions.html#autotoc_md146',1,'X4x0 Targets and Outputs']]],
  ['and_20power_20cycling_137',['Hot-Plugging and Power-Cycling',['../page_ni_rio_kernel.html#linux_swapping',1,'']]],
  ['and_20power_20cycling_138',['Hot-plugging and Power-cycling',['../page_ni_rio_kernel.html#win_swapping',1,'']]],
  ['and_20property_20resolution_139',['Property Resolvers and Property Resolution',['../page_properties.html#props_resolvers',1,'']]],
  ['and_20qsfp_20protocols_140',['SFP+ and QSFP+ protocols',['../page_usrp_n3xx.html#n3xx_rh_sfp_protocols',1,'']]],
  ['and_20read_20on_20spi_141',['Write and read on SPI',['../page_x400_gpio_api.html#x4x0_spi_r_w',1,'']]],
  ['and_20rear_20panel_142',['and Rear Panel',['../page_usrp_e3xx.html#e320_panels',1,'Front and Rear Panel'],['../page_usrp_n3xx.html#n3xx_mg_panels',1,'Front and Rear Panel'],['../page_usrp_n3xx.html#n3xx_rh_panels',1,'Front and Rear Panel']]],
  ['and_20reporting_20sim_5fexec_5freport_20vh_143',['Execution and Reporting (sim_exec_report.vh)',['../md_usrp3_2sim_2libs__general.html#autotoc_md189',1,'']]],
  ['and_20requirements_144',['and Requirements',['../md_usrp2_2build__instructions.html#autotoc_md97',1,'Dependencies and Requirements'],['../md_usrp3_2build__instructions.html#autotoc_md110',1,'Dependencies and Requirements']]],
  ['and_20resets_20sim_5fclks_5frsts_20vh_145',['Clocks and Resets (sim_clks_rsts.vh)',['../md_usrp3_2sim_2libs__general.html#autotoc_md196',1,'']]],
  ['and_20resource_20types_146',['Properties on multi-channel blocks and resource types',['../page_properties.html#props_multichan',1,'']]],
  ['and_20sampling_20rate_147',['Master Clock Rate, Tick Rate, and Sampling Rate',['../page_twinrx.html#twinrx_dboards_mcr',1,'']]],
  ['and_20sd_20card_20images_148',['and SD card images',['../page_usrp_e3xx.html#e3xx_fsbuild',1,'Building custom filesystems and SD card images'],['../page_usrp_n3xx.html#n3xx_fsbuild',1,'Building custom filesystems and SD card images']]],
  ['and_20slow_149',['and Slow',['../page_usrp_n3xx.html#n3xx_mg_initialization',1,'Device Initialization (Fast and Slow)'],['../page_usrp_n3xx.html#n3xx_rh_initialization',1,'Device Initialization (Fast and Slow)']]],
  ['and_20streamers_150',['Configuring Devices and Streamers',['../page_configuration.html',1,'page_devices']]],
  ['and_20switches_151',['On-Board Connectors and Switches',['../page_usrp_b200.html#b200_switches',1,'']]],
  ['and_20the_20python_20global_20interpreter_20lock_152',['Thread Safety and the Python Global Interpreter Lock',['../page_python.html#python_usage_gil',1,'']]],
  ['and_20time_20synchronization_153',['and Time Synchronization',['../page_usrp_e3xx.html#e31x_hw_sync',1,'Clock and Time Synchronization'],['../page_usrp_e3xx.html#e320_hw_sync',1,'Clock and Time Synchronization']]],
  ['and_20tx_20reference_20power_20levels_154',['RX and TX reference power levels',['../page_power.html#power_ref_levels',1,'']]],
  ['and_20usage_155',['and Usage',['../page_ni_rio_kernel.html#linux_rio',1,'Linux NI RIO Installation and Usage'],['../page_ni_rio_kernel.html#windows_rio',1,'Windows NI RIO Installation and Usage']]],
  ['and_20usrp2_20n210_20series_20compat_20numbers_156',['X300 and USRP2/N210 Series Compat Numbers',['../page_compat.html#compat_x3u2',1,'']]],
  ['and_20workers_20are_20derived_20from_20this_20class_157',['graph. Data nodes and workers are derived from this class.',['../classuhd_1_1experts_1_1dag__vertex__t.html#autotoc_md255',1,'']]],
  ['antenna_20ports_158',['Antenna Ports',['../page_fbx.html#fbx_antenna',1,'Antenna Ports'],['../page_zbx.html#zbx_ant_ports',1,'Antenna Ports']]],
  ['antenna_20routing_159',['Antenna Routing',['../page_twinrx.html#twinrx_antenna_routing',1,'']]],
  ['antenna_20switches_160',['Antenna Switches',['../page_usrp_e3xx.html#e31x_dboard_e310_band_select',1,'Frontend Filter and Antenna Switches'],['../page_usrp_e3xx.html#e31x_dboard_e310_frontend_a_switches',1,'Frontend Side A Filter and Antenna Switches'],['../page_usrp_e3xx.html#e31x_dboard_e310_frontend_b_switches',1,'Frontend Side B Filter and Antenna Switches']]],
  ['antenna_5fiface_161',['antenna_iface',['../classuhd_1_1rfnoc_1_1rf__control_1_1antenna__iface.html',1,'uhd::rfnoc::rf_control']]],
  ['antenna_5fiface_2ehpp_162',['antenna_iface.hpp',['../antenna__iface_8hpp.html',1,'']]],
  ['antenna_5fradio_5fcontrol_5fmixin_163',['antenna_radio_control_mixin',['../classuhd_1_1rfnoc_1_1rf__control_1_1antenna__radio__control__mixin.html',1,'uhd::rfnoc::rf_control']]],
  ['any_164',['ANY',['../classuhd_1_1device.html#ae23e4e2a10b8ba796cc5fbe08c73d021acb9b3d7b943266ee999835fac9700940',1,'uhd::device::ANY'],['../namespaceuhd_1_1usrp_1_1cal.html#a48b1a78fb63c973e5150bb82ea10badda8e1bde3c3d303163521522cf1d62f21f',1,'uhd::usrp::cal::ANY']]],
  ['any_5fport_165',['ANY_PORT',['../classuhd_1_1rfnoc_1_1node__t.html#af9843803658d2afc0d306e2846670aba',1,'uhd::rfnoc::node_t']]],
  ['api_166',['API',['../page_capi.html',1,'C API'],['../page_coding.html',1,'Coding to the API'],['../page_identification.html#id_identifying_api',1,'Device discovery through the API'],['../page_usrp_n3xx.html#n3xx_filter_api',1,'Filter API'],['../page_gpio_api.html',1,'GPIO API'],['../page_coding.html#coding_api_hilevelc',1,'High-Level: The C API'],['../page_coding.html#coding_api_hilevel_rfnoc',1,'High-Level: The RFNoC API'],['../page_capi.html#capi_install',1,'Installing the C API'],['../page_python.html#python_install',1,'Installing the Python API'],['../page_coding.html#coding_api_lowlevel',1,'Low-Level: The device API'],['../page_usrp_b200.html#b200_fe_power',1,'Power API'],['../page_usrp_e3xx.html#e3xx_power_api',1,'Power API'],['../page_usrp_x3x0.html#x3x0_misc_power',1,'Power API'],['../page_python.html',1,'Python API'],['../page_usrp_x4xx.html#x4xx_usage_sensors',1,'The Sensor API'],['../page_usrp_e3xx.html#e3xx_usage_sensors',1,'The sensor API'],['../page_usrp_n3xx.html#n3xx_usage_sensors',1,'The sensor API'],['../page_c_api.html',1,'UHD - C API'],['../page_capi.html#capi_usage',1,'Using the C API'],['../page_python.html#python_usage',1,'Using the Python API'],['../page_x400_gpio_api.html',1,'X4x0 GPIO API']]],
  ['api_20documentation_167',['API Documentation',['../page_uhd.html#autotoc_md51',1,'']]],
  ['api_20interfaces_168',['Various API interfaces',['../page_coding.html#coding_api',1,'']]],
  ['apis_169',['Device Implementations of Power Level APIs',['../page_power.html#power_implementation',1,'']]],
  ['application_170',['Application',['../page_usrp_x3x0_config.html#x3x0cfg_hostpc_rtprio_app',1,'Real-Time Scheduling in your Application'],['../page_gpsdo.html#gpsdo_use',1,'Using the GPSDO in Your Application'],['../page_gpsdo_b2x0.html#gpsdob_using',1,'Using the GPSDO in Your Application'],['../page_gpsdo_x3x0.html#gpsdox_using',1,'Using the GPSDO in Your Application']]],
  ['application_171',['Configuring the device in an application',['../page_usrp_x3x0.html#x3x0_misc_settings',1,'']]],
  ['application_20notes_172',['General Application Notes',['../page_general.html',1,'page_devices']]],
  ['application_20notes_20usrp_20b2x0_20models_173',['Internal GPSDO Application Notes (USRP-B2x0 Models)',['../page_gpsdo_b2x0.html',1,'page_usrp_b200']]],
  ['application_20notes_20usrp_20x3x0_20models_174',['Internal GPSDO Application Notes (USRP-X3x0 Models)',['../page_gpsdo_x3x0.html',1,'page_usrp_x3x0']]],
  ['applications_175',['One-off transmit/receive applications',['../page_python.html#python_usage_oneoff',1,'']]],
  ['applications_20that_20require_20uhd_20using_20cmake_176',['Building applications that require UHD using CMake',['../page_build_guide.html#build_apps',1,'']]],
  ['aq_177',['AQ',['../page_rdtesting.html#autotoc_md43',1,'']]],
  ['architecture_178',['The Module Peripheral Manager (MPM) Architecture',['../page_mpm.html',1,'page_devices']]],
  ['architecture_179',['E310 Migration Guide to MPM architecture',['../page_usrp_e3xx.html#e31x_migration',1,'']]],
  ['architecture_20overview_180',['Architecture Overview',['../page_mpm.html#mpm_arch',1,'']]],
  ['archive_20install_181',['Archive install',['../page_images.html#images_prebuilt_archive',1,'']]],
  ['are_20derived_20from_20this_20class_182',['graph. Data nodes and workers are derived from this class.',['../classuhd_1_1experts_1_1dag__vertex__t.html#autotoc_md255',1,'']]],
  ['are_20there_20so_20many_20different_20compat_20numbers_183',['Why are there so many different compat numbers?',['../page_compat.html#compat_faq_whymany',1,'']]],
  ['arg_5fargs_184',['ARG_ARGS',['../classuhd_1_1rfnoc_1_1blockdef_1_1arg__t.html#a767d27244f76221454adb4498899d0f9',1,'uhd::rfnoc::blockdef::arg_t']]],
  ['arg_5ft_185',['arg_t',['../classuhd_1_1rfnoc_1_1blockdef_1_1arg__t.html',1,'uhd::rfnoc::blockdef::arg_t'],['../classuhd_1_1rfnoc_1_1blockdef_1_1arg__t.html#a531c5ef42830beba7f8cff1a34b77b8b',1,'uhd::rfnoc::blockdef::arg_t::arg_t()']]],
  ['args_186',['Args',['../page_dpdk.html#dpdk_device_args',1,'Enabling DPDK with UHD Device Args'],['../page_configuration.html#config_stream_args',1,'Streaming Arguments (Stream Args)']]],
  ['args_187',['args',['../structuhd_1_1image__loader_1_1image__loader__args__t.html#a01f51464444fdd4715ee1fd3fa9faf55',1,'uhd::image_loader::image_loader_args_t::args'],['../structuhd_1_1rfnoc_1_1action__info.html#af65d69bc0fcc5c25a51becb9b828a1c9',1,'uhd::rfnoc::action_info::args'],['../structuhd_1_1rfnoc_1_1noc__block__base_1_1make__args__t.html#a14c510973af389bb8939a4faf2cf38b9',1,'uhd::rfnoc::noc_block_base::make_args_t::args'],['../structuhd_1_1stream__args__t.html#a4463f2eec2cc7ee70f84baacbb26e1ef',1,'uhd::stream_args_t::args'],['../structuhd__tune__request__t.html#a858c24b6165cf396c7a09147f6075933',1,'uhd_tune_request_t::args'],['../structuhd_1_1tune__request__t.html#aeaaf97e9272ff453174e1be3dd468167',1,'uhd::tune_request_t::args'],['../structuhd__stream__args__t.html#af6a465011ce9b156ec720df77b92af54',1,'uhd_stream_args_t::args']]],
  ['args_5ft_188',['args_t',['../classuhd_1_1rfnoc_1_1blockdef.html#acdff3d0954864ff63cc78b79b4f4c611',1,'uhd::rfnoc::blockdef']]],
  ['arguments_189',['Arguments',['../page_configuration.html#config_stream_args_args',1,'Additional Stream Arguments'],['../page_usrp_x4xx.html#x4xx_usage_args',1,'Device Arguments'],['../page_configuration.html#config_stream_args_transport',1,'Transport-related Stream Arguments']]],
  ['arguments_190',['arguments',['../page_usrp_e3xx.html#e3xx_usage_device_args',1,'Device arguments'],['../page_usrp_n3xx.html#n3xx_usage_device_args',1,'Device arguments'],['../page_usrp_x3x0.html#x3x0_usage_device_args',1,'Device arguments']]],
  ['arguments_20stream_20args_191',['Streaming Arguments (Stream Args)',['../page_configuration.html#config_stream_args',1,'']]],
  ['arm_20platforms_192',['Compiling for ARM platforms',['../page_build_guide.html#build_instructions_unix_arm',1,'']]],
  ['artifact_193',['Artifact',['../page_usrp_x4xx.html#x4xx_updating_filesystems_mender_artifact',1,'Downloading a Mender Artifact'],['../page_usrp_x4xx.html#x4xx_updating_filesystems_mender_install',1,'Installing the Mender Artifact']]],
  ['as_5fmonotonic_194',['as_monotonic',['../structuhd_1_1meta__range__t.html#a379b41b023dcdfe7e0006a81389771cc',1,'uhd::meta_range_t']]],
  ['asap_195',['ASAP',['../classuhd_1_1time__spec__t.html#a512aa5f55c2f7341321e975b7dbfa605',1,'uhd::time_spec_t']]],
  ['assembling_20the_20e3xx_196',['Assembling the E3XX',['../page_usrp_e3xx.html#e3xx_getting_started_assembling',1,'']]],
  ['assembling_20the_20n3xx_197',['Assembling the N3XX',['../page_usrp_n3xx.html#n3xx_getting_started_assembling',1,'']]],
  ['assembling_20the_20x300_20x310_20kit_198',['Assembling the X300/X310 kit',['../page_usrp_x3x0.html#x3x0_getting_started_assembling',1,'']]],
  ['assembling_20the_20x4x0_199',['Assembling the X4x0',['../page_usrp_x4xx.html#x4xx_getting_started_assembling',1,'']]],
  ['assert_5ferror_200',['ASSERT_ERROR',['../md_usrp3_2sim_2libs__general.html#autotoc_md194',1,'']]],
  ['assert_5ffatal_201',['ASSERT_FATAL',['../md_usrp3_2sim_2libs__general.html#autotoc_md193',1,'']]],
  ['assert_5fhas_202',['assert_has',['../namespaceuhd.html#ad3156c934fc71d1738ff9aea64b853fd',1,'uhd::assert_has(const Range &amp;range, const T &amp;value, const std::string &amp;what=&quot;unknown&quot;)'],['../namespaceuhd.html#a6ea1a6336a5ee0168e30a76af6a807e1',1,'uhd::assert_has(const Range &amp;range, const T &amp;value, const std::string &amp;what)']]],
  ['assert_5fhas_2ehpp_203',['assert_has.hpp',['../assert__has_8hpp.html',1,'']]],
  ['assert_5fhas_2eipp_204',['assert_has.ipp',['../assert__has_8ipp.html',1,'']]],
  ['assert_5fwarning_205',['ASSERT_WARNING',['../md_usrp3_2sim_2libs__general.html#autotoc_md195',1,'']]],
  ['assertion_5ferror_206',['assertion_error',['../structuhd_1_1assertion__error.html',1,'uhd::assertion_error'],['../structuhd_1_1assertion__error.html#a73690cc3a03931c8b32daf15a9bc6400',1,'uhd::assertion_error::assertion_error()']]],
  ['async_5fmetadata_5ft_207',['async_metadata_t',['../structuhd_1_1async__metadata__t.html',1,'uhd']]],
  ['async_5fmsg_5fcallback_5ft_208',['async_msg_callback_t',['../classuhd_1_1rfnoc_1_1register__iface.html#a3e4311bca0e3db29e02e45b90a9e91cf',1,'uhd::rfnoc::register_iface']]],
  ['async_5fmsg_5fvalidator_5ft_209',['async_msg_validator_t',['../classuhd_1_1rfnoc_1_1register__iface.html#a84a9e28b1a4e85aac07d2a6e846a6009',1,'uhd::rfnoc::register_iface']]],
  ['at_210',['at',['../classuhd_1_1transport_1_1buffer__pool.html#abe13583d3dc22534efff90f6880f958e',1,'uhd::transport::buffer_pool']]],
  ['at_20431_20mhz_211',['In this example, the second Rx band would start at 431 MHz.',['../page_usrp_n3xx.html#autotoc_md59',1,'']]],
  ['at_20once_212',['Calibrating multiple paths at once',['../page_power.html#power_cal_switch',1,'']]],
  ['atr_213',['ATR',['../page_fbx.html#fbx_atr',1,'Auto-Transmit-Receive Registers (ATR)'],['../page_zbx.html#zbx_atr',1,'Auto-Transmit-Receive Registers (ATR)'],['../page_gpio_api.html#xgpio_fpanel_atr',1,'Explaining ATR']]],
  ['atr_20control_214',['ATR control',['../page_zbx.html#zbx_gain_table',1,'CPLD-Table Gain Profile with ATR control'],['../page_zbx.html#zbx_gain_tablenoatr',1,'CPLD-Table Gain Profile without ATR control']]],
  ['atr_5freg_5ffull_5fduplex_215',['ATR_REG_FULL_DUPLEX',['../namespaceuhd_1_1usrp_1_1gpio__atr.html#a074cf434d51eb2ab90e8cdffe26b0de8a6263e174094a5c8228522ef3f4a63a4d',1,'uhd::usrp::gpio_atr']]],
  ['atr_5freg_5fidle_216',['ATR_REG_IDLE',['../namespaceuhd_1_1usrp_1_1gpio__atr.html#a074cf434d51eb2ab90e8cdffe26b0de8a5a18a773dd259badc047444589523451',1,'uhd::usrp::gpio_atr']]],
  ['atr_5freg_5frx_5fonly_217',['ATR_REG_RX_ONLY',['../namespaceuhd_1_1usrp_1_1gpio__atr.html#a074cf434d51eb2ab90e8cdffe26b0de8a9f5b7d2c213c9a0ac3fa55b2135169e0',1,'uhd::usrp::gpio_atr']]],
  ['atr_5freg_5ft_218',['atr_reg_t',['../classuhd_1_1usrp_1_1dboard__iface.html#a7967c68b6067a0a4414c009a4b247c2e',1,'uhd::usrp::dboard_iface']]],
  ['atr_5freg_5ftx_5fonly_219',['ATR_REG_TX_ONLY',['../namespaceuhd_1_1usrp_1_1gpio__atr.html#a074cf434d51eb2ab90e8cdffe26b0de8a5bad24b72d24b79ea8d634aade9e90f7',1,'uhd::usrp::gpio_atr']]],
  ['attributes_20of_20properties_220',['Clean/Dirty Attributes of Properties',['../page_properties.html#props_resolvers_cldrty',1,'']]],
  ['author_221',['author',['../namespaceconf.html#a0b68e66074bc74dbb7460951f810b4c8',1,'conf']]],
  ['author_5fexpert_222',['AUTHOR_EXPERT',['../namespaceuhd_1_1experts.html#a1a9022b44420ed2963ec002e66a57b5eaca40937811bb275c210f378f926f307e',1,'uhd::experts']]],
  ['author_5fnone_223',['AUTHOR_NONE',['../namespaceuhd_1_1experts.html#a1a9022b44420ed2963ec002e66a57b5ead1910fa1f7ff0746ea07276d87a915eb',1,'uhd::experts']]],
  ['author_5fuser_224',['AUTHOR_USER',['../namespaceuhd_1_1experts.html#a1a9022b44420ed2963ec002e66a57b5ea901a826921d0bde1ad9c2b5f000a47ea',1,'uhd::experts']]],
  ['auto_20transmit_20receive_20registers_20atr_225',['Auto Transmit Receive Registers ATR',['../page_fbx.html#fbx_atr',1,'Auto-Transmit-Receive Registers (ATR)'],['../page_zbx.html#zbx_atr',1,'Auto-Transmit-Receive Registers (ATR)']]],
  ['auto_5fcoerce_226',['AUTO_COERCE',['../classuhd_1_1property__tree.html#ae509cb2b5e06df9926ab2c0e7e2c76bca5522ce5e197ad2af3a228e2f2b3a80e1',1,'uhd::property_tree']]],
  ['auto_5fresolve_5fmode_5ft_227',['auto_resolve_mode_t',['../namespaceuhd_1_1experts.html#a5eb75c2c00781b0967527ed3fef4feab',1,'uhd::experts']]],
  ['auto_5fresolve_5foff_228',['AUTO_RESOLVE_OFF',['../namespaceuhd_1_1experts.html#a5eb75c2c00781b0967527ed3fef4feaba2e45ce31b8e0b167f048284d2688cd55',1,'uhd::experts']]],
  ['auto_5fresolve_5fon_5fread_229',['AUTO_RESOLVE_ON_READ',['../namespaceuhd_1_1experts.html#a5eb75c2c00781b0967527ed3fef4feaba2531d949eaa488e3e8b8a2f757eeee6d',1,'uhd::experts']]],
  ['auto_5fresolve_5fon_5fread_5fwrite_230',['AUTO_RESOLVE_ON_READ_WRITE',['../namespaceuhd_1_1experts.html#a5eb75c2c00781b0967527ed3fef4feaba580ae217fd83a9d4a12f1ad405cfffa6',1,'uhd::experts']]],
  ['auto_5fresolve_5fon_5fwrite_231',['AUTO_RESOLVE_ON_WRITE',['../namespaceuhd_1_1experts.html#a5eb75c2c00781b0967527ed3fef4feaba209ee2bd142955949581bdce9212765e',1,'uhd::experts']]],
  ['automatic_20clock_20rate_20setting_232',['Automatic Clock Rate Setting',['../page_usrp_b200.html#b200_auto_mcr',1,'']]],
  ['automatic_20master_20clock_20selection_233',['Automatic master-clock selection',['../page_general.html#general_sampleratenotes_automatic',1,'']]],
  ['automatic_20phase_20alignment_20testing_20receiver_234',['Automatic phase alignment testing (Receiver)',['../page_rdtesting.html#rdtesting_phase_rx_auto',1,'']]],
  ['automatic_20procedure_235',['Automatic Procedure',['../page_rdtesting.html#rdtesting_bist_e320_auto',1,'E320 Automatic Procedure'],['../page_rdtesting.html#rdtesting_bist_n3x0_auto',1,'N300/N310 Automatic Procedure']]],
  ['automatic_20test_20procedure_236',['Automatic Test Procedure',['../page_rdtesting.html#rdtesting_fpga_testbenches_auto',1,'Automatic Test Procedure'],['../page_rdtesting.html#rdtesting_devtest_auto',1,'Devtest: Automatic Test Procedure'],['../page_rdtesting.html#rdtesting_fpgadspverif_auto',1,'FPGA DSP Verification: Automatic Test Procedure'],['../page_rdtesting.html#rdtesting_fpgafuncverif_auto',1,'FPGA Functional Verification: Automatic Test Procedure'],['../page_rdtesting.html#rdtesting_gpsdo_auto',1,'GPSDO: Automatic Test Procedure']]],
  ['aux_5fadc_5fa_237',['AUX_ADC_A',['../classuhd_1_1usrp_1_1dboard__iface.html#a2a7475c974d1e454311ab88f92b41fa7ae68da619c198fe8ad31e3e9f8fdb8492',1,'uhd::usrp::dboard_iface']]],
  ['aux_5fadc_5fb_238',['AUX_ADC_B',['../classuhd_1_1usrp_1_1dboard__iface.html#a2a7475c974d1e454311ab88f92b41fa7afc3a24356e776efa159d95469142096e',1,'uhd::usrp::dboard_iface']]],
  ['aux_5fadc_5ft_239',['aux_adc_t',['../classuhd_1_1usrp_1_1dboard__iface.html#a2a7475c974d1e454311ab88f92b41fa7',1,'uhd::usrp::dboard_iface']]],
  ['aux_5fdac_5fa_240',['AUX_DAC_A',['../classuhd_1_1usrp_1_1dboard__iface.html#af2cd3859feb52b75d8a0ab2a13da8720a4f21321dffddc75eb339669280d09304',1,'uhd::usrp::dboard_iface']]],
  ['aux_5fdac_5fb_241',['AUX_DAC_B',['../classuhd_1_1usrp_1_1dboard__iface.html#af2cd3859feb52b75d8a0ab2a13da8720a5fe9e65851b0bd66268b5c8b5d879b12',1,'uhd::usrp::dboard_iface']]],
  ['aux_5fdac_5fc_242',['AUX_DAC_C',['../classuhd_1_1usrp_1_1dboard__iface.html#af2cd3859feb52b75d8a0ab2a13da8720aa4f963494141c4eada1899623cc054cd',1,'uhd::usrp::dboard_iface']]],
  ['aux_5fdac_5fd_243',['AUX_DAC_D',['../classuhd_1_1usrp_1_1dboard__iface.html#af2cd3859feb52b75d8a0ab2a13da8720a0ccc4235e51dfe3b3617a570842f3753',1,'uhd::usrp::dboard_iface']]],
  ['aux_5fdac_5ft_244',['aux_dac_t',['../classuhd_1_1usrp_1_1dboard__iface.html#af2cd3859feb52b75d8a0ab2a13da8720',1,'uhd::usrp::dboard_iface']]],
  ['available_20commands_245',['Available commands',['../page_usrpctl.html#usrpctl_commands',1,'']]],
  ['available_20sensors_246',['Available Sensors',['../page_usrp2.html#usrp2_misc_sensors',1,'Available Sensors'],['../page_usrp_b100.html#b100_misc_sensors',1,'Available Sensors'],['../page_usrp_e1x0.html#e1x0_misc_sensors',1,'Available Sensors'],['../page_usrp_x3x0.html#x3x0_misc_sensors',1,'Available Sensors']]],
  ['average_247',['AVERAGE',['../namespaceuhd_1_1rfnoc.html#ade8db4b0b967368b6e4310e487dcdd57a16de38737a9f8366e9b2042b4e9b6290',1,'uhd::rfnoc']]],
  ['axi_20interface_20libraries_248',['Legacy AXI Interface Libraries',['../md_usrp3_2sim_2libs__axi.html',1,'']]],
  ['axi4_20reader_249',['Meta: AXI4 Reader',['../md_usrp3_2sim_2libs__axi.html#autotoc_md187',1,'']]],
  ['axi4_20sim_5faxi4_5flib_20vh_250',['Memory Mapped AXI4 (sim_axi4_lib.vh)',['../md_usrp3_2sim_2libs__axi.html#autotoc_md181',1,'']]],
  ['axi4_20stream_20sim_5faxis_5flib_20vh_251',['AXI4 Stream (sim_axis_lib.vh)',['../md_usrp3_2sim_2libs__axi.html#autotoc_md157',1,'']]],
  ['axi4_20writer_252',['Meta: AXI4 Writer',['../md_usrp3_2sim_2libs__axi.html#autotoc_md186',1,'']]]
];
